AMRAD HacDC FPGA Workshops (long)

Frank Gentges metavox at
Thu Oct 8 10:38:19 CDT 2009


Maitland, Rob Seastrom and myself went down to DC last night and 
attended the firs HacDC FPGA Workshop.  It looks like it will be a good 
set of sessions for our Charleston builders to learn the Verilog 
programming language. There were enough people that the teacher got lots 
of questions.  The downside is the trip down into DC at rush hour.  Rob 
and I drove together and it took over 2 hours but that was probably due 
to stalled vehicle on the GW Parkway.  Nonetheless, I don't think that 
will work for me on a regular basis.

They are putting the slides up on their web site and the last nights 
slides are already there.  A video camera recorded the session and they 
plan to put it up for download shortly.  It is expected to be in a Mpeg2 
compatible format that we should all be able to read.  The video will be 
in a decent resolution but will also be large.  When it is put up, I 
will download it and see how well that has worked out.

We can go to their web site and download the slides now.  Go to the List 
of Lectures and on the first session click under the Topic Covered.  You 
will be taken to the RapidShare web site for getting the download. 
Their web site is at

I expect to see the video here also.  With the slides and video we 
should be able to follow their workshop sessions at my lab.  My plan is 
to do this on Wednesday evenings.  The material will be one week after 
the session at HacDC.  They expect their last session on December 16th 
so our last session would fall on December 24th so we would have to do 
that session at some other time to avoid collision with Christmas eve.

I can set up the projector so we can all sit around to view the video 
and we can hand out copies of the slides.  As the work progresses we 
will move to the work benches here in the lab with our Nexsys2 boards 
and notebook computers to work on the exercises.

The good thing is we have way more workbench spaces than downtown and 
everyone can run their own work at the same time.  This way we can help 
each other over the rough spots as we learn how to do this Verilog thing.

I also want to get the IRLP up and running real soon now.  This will let 
our members that cannot attend in person to have a means to talk with 
the group at the lab.  Terry Fox  and Joe Sluz are the persons that come 
to mind.

I have not heard from anyone yet about interest in attending.  Do we 
have any interest?  Please speak up and email me so I can judge the 
group size.

Frank K0BRA

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